Hi,
Christopher Fraser wrote:
>
> > What is the function of ebp? I don't believe the 68k has an
> > analagous register (a dedicated one at least). The 68k uses
> > the link command at the entry of a function which acts similarly
> > to ebp (correct?). If the longjmp warps to a function that
> > does this then the link register doesnt have to be set does it?
>
> ebp is the frame pointer -- I don't _think_ it has to be used at
> all, but it can be useful for debugging. But I'm not really sure,
> my 386 book doesn't talk about it much other than the enter
> instruction fiddling it as per the standard i386 calling conventions.
> I'm not sure what's done on the 68k with the frame pointer either.
It's not particularly special - it's usually just used to reference the
position of esp (less 4 for the save of the original value of ebp) on entry
to a function. The x86 instruction set does have a few tricks it can do by
combining ebp and ebx to speed things up. I've used it as just a general
purpose reg in assembly code many times before though.
> > At any rate here is the code I am working with right now:
> >
> > /*
> > * New entity returns with 0 value; SP is one lower so that
> > * the resume() path has a place to write its return address.
> > * This simulates the normal context switch mechanism of
> > * setjmp/longjmp.
> > */
> > new->t_kregs->pc = (ulong)retuser;
> > new->t_kregs->sp = ((ulong)(new->t_uregs)) - sizeof(ulong);
> > new->t_uregs->f_regs[REG_D0] = 0;
> >
The sizeof(ulong) just allows enough space for the return address (eip) to
be written before the stack end (in longjmp())
> > in resume():
> > /*
> > * Make kernel stack come in on our own stack now. This
> > * isn't used until we switch out to user mode, at which
> > * time our stack will always be empty.
> > * XXX esp is overkill; only esp0 should ever be used.
> > */
> > tss->esp0 = tss->esp = (ulong)
> > ((char *)(t->t_kstack) + KSTACK_SIZE);
> >
> > This one has me really confused. I'm not to clear on what the tss
> > does.
VSTa doesn't use TSS's the way some of the Unix clones do (eg Linux).
Basically whenever we want to move from ring 0 to ring 3 code though
(interrupts, traps, or calls through call gates, etc) the x86 uses the TSS
to keep track of what's going on. It'd be a really neat trick for general
ptocess handling if it wasn't for the fact that FPU states aren't stored and
it takes an enourmous amount of time to save the state in the TSS. A quick
flick through the Pentium book shows about 80ish clocks and that's *much*
faster than a 386 or 486. Pushing/poping registers as we do at the moment
is much quicker
Regards,
Dave
Received on Thu Dec 1 06:02:23 1994
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