Hi,
[Andrew Valencia <vandys@cisco.com> writes:]
> Did I make the P-code idea clear?
Yes.
> I think a threaded interpreter would be overkill, ...
This was what I was interested in finding out. For the original
problem, I agree with you (and Tim needs a solution right now). But,
a TIL might give you flexibility to do oddball things in the future.
> ... and also most of the fast TIL (Threaded Interpretive Language)
> interpreters I've worked with would be difficult to make position
> independent.
If you passed the tcode "source" to enable_isr(), I don't see why
you need position independence. This means, of course, that the
kernel needs to translate the tcode "source" to something that
can be interpreted, but TIL's tend to have very simple syntax's.
> Here's some off-the-cuff code ideas.
Thanks for the example. A couple of questions - how you handle the case
where there are multiple interrupt bits (eg,. complete interrupt, error
interrupt, etc.)? Also, do you plan to add logical operations (eg.,
read the contents of a register, bitwise OR in a flag, and write the
value back to the register)?
Mike Larson
Received on Fri Nov 11 10:07:06 1994
This archive was generated by hypermail 2.1.8 : Thu Sep 22 2005 - 15:12:10 PDT