UMC U5S CPU (486SX clone)

Hi!

I just replaced my amd486 to UMC U5S cpu, and VSTA -say- not works
really well. When program exits, it in sometimes (70% on first program
to exit, much less than, really strange) raises following 'assertion
failed':

                        ASSERT_DEBUG(a->a_flags & ATL_CACHE,
                                "pset_free: non-cache ref");

The cpu is rather strange (althrough it seems to work well with
linux). I would like to ask where is TLB invalidation being done? I
did not found that place.

                                                        Pavel

One more question: This CPU does not have FPU. Is it problem? I know
there's no emulation, but is missing FPU likely causing assertion
failed when logging in?

(This is linux /proc/cpuinfo:)

processor : 0
cpu family : 4
model : U5S
vendor_id : UMC UMC UMC
stepping : 3
fdiv_bug : no
hlt_bug : no
sep_bug : no
f00f_bug : no
fpu : no
fpu_exception : no
cpuid level : 1
wp : yes
flags :
bogomips : 26.42

-- 
I'm really pavel@atrey.karlin.mff.cuni.cz. 	   Pavel
Look at http://atrey.karlin.mff.cuni.cz/~pavel/ ;-).